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PrincetonUniversity/prga

Open-source FPGA research and prototyping framework.
Source code at GitHub http://parallel.princeton.edu/prga/
PrincetonUniversity/prga.json
{
  "createdAt": "2019-01-03T20:31:30Z",
  "defaultBranch": "release",
  "description": "Open-source FPGA research and prototyping framework.",
  "fullName": "PrincetonUniversity/prga",
  "homepage": "http://parallel.princeton.edu/prga/",
  "language": "SCSS",
  "name": "prga",
  "pushedAt": "2024-08-08T18:28:06Z",
  "stargazersCount": 210,
  "topics": [],
  "updatedAt": "2025-11-12T03:06:06Z",
  "url": "https://github.com/PrincetonUniversity/prga"
}

![PRGA logo]!(/docs/source/_static/images/logo.png)

Princeton Reconfigurable Gate Array

Section titled “Princeton Reconfigurable Gate Array”

License Documentation Status ci-install ci-dev

Build your own FPGA Chip or embedded FPGA IP with Python, and enjoy a fully open-source, auto-generated CAD flow specifically for your custom FPGA.

Find out more

Section titled “Find out more”

Quickstart

Section titled “Quickstart”
Terminal window
# Install PRGA and dependencies
cd /path/to/prga/
./envscr/install


# Install iverilog (Icarus Verilog) if Synopsys VCS is not available
# ...


# Activate Python virtual environment
source ./envscr/activate


# build an example FPGA
make -C examples/fpga/magic/k4_N2_8x8


# create CAD & verification project
make -C examples/app/bcd2bin/magic_k4_N2_8x8


# run RTL-to-bitstream flow and post-implementation simulation
make -C examples/app/bcd2bin/magic_k4_N2_8x8/tests/basic